1. Field of the Invention
The present invention relates to an array substrate for a liquid crystal display (LCD) device and more particularly, to an array substrate having gate and data lines and a manufacturing method thereof.
2. Discussion of the Related Art
Generally, a liquid crystal display (LCD) device includes two substrates that are spaced apart and face each other with a liquid crystal material layer interposed between the two substrates. Each of the substrates includes electrodes that face each other, wherein a voltage applied to each electrode induces an electric field between the electrodes and within the liquid crystal material layer. An intensity or direction of the applied electric field affects alignment of the liquid crystal molecules of the liquid crystal material layer. Accordingly, the LCD device displays an image by varying light transmissibility through the liquid crystal material layer in accordance with the arrangement of the liquid crystal molecules.
FIG. 1 is an enlarged perspective view of a liquid crystal display (LCD) device according to the related art. In FIG. 1, an LCD device 11 has upper and lower substrates 5 and 22, which are spaced apart from and facing each other, and a liquid crystal material layer 14 interposed between the upper and lower substrates 5 and 22. The upper substrate 5 includes a black matrix 6, a color filter layer 8, and a transparent common electrode 18 subsequently disposed on an interior surface thereof. The black matrix 6 includes openings having one of three sub-color filters of red (R), green (G), and blue (B).
A gate line 13 and a data line 15 are formed on an interior surface of the lower substrate 22, which is commonly referred to as an array substrate, such that the gate line 13 and the date line 15 cross each other to define a pixel area P. In addition, a thin film transistor T is formed at the crossing of the gate line 13 and the data line 15 and includes a gate electrode, a source electrode, and a drain electrode. A pixel electrode 17 is formed within the pixel area P to correspond to the sub-color filters (R), (G), and (B), and is electrically connected to the thin film transistor T. The pixel electrode 17 is made of a light transparent conductive material, such as indium-tinoxide (ITO).
A storage capacitor C is connected to the pixel electrode 17. The gate line 13 acts as a first capacitor electrode and a metal layer 30 acts as a second capacitor electrode that is connected to the pixel electrode 17. The metal layer 30 is formed when source and drain electrodes for the thin film transistor T are formed.
A scanning pulse is supplied to the gate electrode of the thin film transistor T along the gate line 13, and a data signal is supplied to the source electrode of the thin film transistor T along the data line 15. Accordingly; light transmission through the liquid crystal material layer 14 is adjusted by controlling electrical and optical properties of the liquid crystal material layer 14. For example, the liquid crystal material layer 14 includes a dielectric anisotropic material having spontaneous polarization properties such that the liquid crystal molecules form a dipole when the electric field is induced. Thus, the liquid crystal molecules of the liquid crystal material layer 14 are controlled by the applied electric field. In addition, optical modulation of the liquid crystal material layer 14 is adjusted according to the arrangement of the liquid crystal molecules. Therefore, images on the LCD device are produced by controlling light transmittance of the liquid crystal material layer 14 by optical modulation of the liquid crystal material layer 14.
Detailed description of the pixel area P is explained with reference to FIG. 2 which is an enlarged plan view of an array substrate for an LCD device according to the related art. Gate lines 52 and data lines 66 are formed on a substrate 50 to cross each other, thereby defining pixel areas P.
A thin film transistor T is formed at the crossing of each of the gate and data lines 52 and 66 to function as a switching element. The thin film transistor T includes a gate electrode 54 that is connected to the gate line 52 to receive scanning signals, a source electrode 62 that is connected to the data line 66 and receives data signals, and a drain electrode 64 that is spaced apart from the source electrode 62. In addition, the thin film transistor T includes an active layer 76 between the gate electrode 52 and the source and drain electrodes 62 and 64. A transparent pixel electrode 70 is formed in the pixel area P and is connected to the drain electrode 64. The pixel electrode 70 is connected to a metal layer 78 and forms a storage capacitor C.
In addition, with reference to FIG. 3, at a crossing area E between the gate and data lines 52 and 66 there is a parasitic capacitor, wherein the gate line 52 and the data line 66 act as capacitor electrodes and the gate insulating layer 56 acts as a dielectric layer. The parasitic capacitor deteriorates the electric characteristic of the LCD device.
Thus, an improved structure of the array substrate is shown in FIG. 4. At the crossing area E a portion 106 of the gate line is cut away, and the area of the gate line under the data line become smaller. Thus, the capacitance of the parasitic capacitor is reduced.
Furthermore, there is an open portion or cutaway portion 106, through which light from a back light device can be emitted and be reflected against the data line. The transmitted and reflected light can reach the active layer of the thin film transistor T, thus deteriorating the electric characteristic of the thin film transistor.